February 2024

Upcoming Event

Scientific Analog is coming to San Jose, CA! Get up to speed with the latest techniques for verifying analog circuits in SystemVerilog & UVM.

This application note shows how to model the low-power (LP) and high-speed (HS) transceivers of MIPI D-PHY.

When measuring the frequency of a clock input, why does 'meas_freq' primitive produce twice its frequency value?

This primitive outputs the frequency of the input clock.

Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More

Webinar on Silicon Photonics Modeling & Simulation, Modeling Nonlinear PAM4 Transmitters, and More

XMODEL at DAC 2024, Modeling an Adaptive DFE Receiver, and More

Modeling a Phase Interpolator with INL/DNL, Using PSL Assertions for Analog Checks, and More

Modeling an Oscillator with Resettable Phase, Multiple Outputs, and Arbitrary Waveforms