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Scientific Analog, Inc. is sponsoring a tutorial titled, “Harnessing the Power of UVM for AMS Verification with XMODEL," at the 2023 Design and Verification Conference & Exhibition United States (DVCON U.S.). The tutorial is scheduled at 13:30-17:00 PM Pacific Time on Thursday, March 2, 2023, and will be given by Jaeha Kim and Charles Dančak.

The tutorial offers hands-on learning for writing UVM testbenches for analog/mixed-signal circuits. It will show that the framework of UVM can be extended to verifying analog circuits simply by using a well-defined fixture module encapsulating the device-under-verification (DUV) model and its AMS instrumentations described with XMODEL primitives. Further information can be found on this website.

Scientific Analog, Inc. is a leading developer and provider of a mixed-signal simulator in SystemVerilog (XMODEL), automatic model generator (MODELZEN), and schematic-based design environment (GLISTER). DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies.

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