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Scientific Analog, Inc. congratulates the researchers of Seoul National University, Seoul, Korea on the recent acceptance of their papers to the 2021 Design and Verification Conference & Exhibition United States (DVCON U.S.), sponsored by Accellera Systems Initiative. Due to COVID-19, the conference will be held March 1-4, 2021 on a virtual conference and exhibition platform.

The first paper titled, “An Equivalent Modeling Approach for High-Density DRAM Array System-Level Design Space Exploration in SystemVerilog,” describes an equivalent modeling technique for large-scale DRAM arrays in XMODEL. By modeling only the active parts of the memory array and loading/storing its internal states dynamically, a fast simulation speed that does not increase with the array size is achieved. It will be presented at 10:30am on Tuesday, March 2, 2021 in the Modeling and Patterns Session (A2P-I).

The second paper titled, “A Volterra-Series Model in SystemVerilog/XMODEL for Nonlinear RF Low-Noise Amplifiers,” demonstrates a nonlinear, Volterra-series model for an RF low-noise amplifier in XMODEL. Using the perturbation method, a Volterra-series model is broken into a collection of linear systems and polynomial functions, each of which can be modeled with the XMODEL primitives. It will be presented at 10am on Wednesday, March 3, 2021 in the Mixed-Signal Design and Verification Session (B1L-C).

"What is great about these papers is that they are not simply using XMODEL to get better performance; they are combining new ideas with XMODEL to achieve the next level of performance," said Jaeha Kim, CEO and founder of Scientific Analog.

Scientific Analog, Inc. is a leading developer and provider of a mixed-signal simulator in SystemVerilog (XMODEL), automatic model generator (MODELZEN), and schematic-based design environment (GLISTER). DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies.

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