September 2023

Model of the Month

Modeling a clocked comparator latch with reset, sampling, and regeneration behaviors

Can you model a regenerative amplifier with analog outputs performing reset, sampling, and regeneration? No, a transistor-level model doesn’t count.

Tip of the Month

Digital-to-analog converter (DAC) with finite settling time

Check out how to model a DAC showing a first- or second-order settling response with limits on its slew rate.

Primitive of the Month

ilimit

This primitive lets you set the maximum and minimum limits on the current that flows through a branch.

Latest Issues

December 2024

Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More

November 2024

Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More

October 2024

UVM Testbench for Verifying Adaptive DFE, Measuring the PLL's Open-Loop Transfer Function, and More

September 2024

XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More

August 2024

Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More