July 2024

Upcoming Webinar

This webinar will demonstrate how one can model and simulate state-of-the-art silicon photonics WDM transceivers in SystemVerilog, using XMODEL.

What if you need to model a PAM4 transmitter with RLM < 1 to stress-test your PAM4 receiver?

You can use the XMULAN Python library to read waveform data from a JEZ-format file and export them in text format for further processing.

This primitive measures the voltage difference between two circuit nodes.

Estimating Eye Openings and FFE/DFE Settings from Channel SBR

Delay, Delay, Delay!

EQCHECK, Adaptive Decision-Feedback Equalizer, and More

XMODEL at DVCon US, Introducing EQCHECK, and More

Generating Random Step Sequences for Stress-Testing, Measuring Single-Bit Responses, and More