July 2022

Webinar on Demand

Writing UVM/SystemVerilog testbenches for analog/mixed-signal verification

Missed this webinar? Watch this video recording and learn how to write UVM testbenches for analog circuits.

Model of the Month

Modeling CMOS image sensor with sub-pixel architecture

This application note models the CMOS image sensor using sub-pixel architecture, recently published by Yorito Sakano, et al., at ISSCC 2020.

Tip of the Month

Fixing the values of certain digital mode inputs of a UDM

Learn simple mode specification expressions that can fix the values of unused digital mode bits of a UDM.

Primitive of the Month

switch

This primitive models an ideal switch with on and off resistances.

Latest Issues

December 2024

Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More

November 2024

Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More

October 2024

UVM Testbench for Verifying Adaptive DFE, Measuring the PLL's Open-Loop Transfer Function, and More

September 2024

XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More

August 2024

Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More