Upcoming Tutorial
Harnessing the Power of UVM for AMS Verification with XMODEL
Don't miss the opportunity to join this 3-hour hands-on tutorial at DVCon US 2023 and learn how to write UVM testbenches for analog/mixed-signal circuits!
Don't miss the opportunity to join this 3-hour hands-on tutorial at DVCon US 2023 and learn how to write UVM testbenches for analog/mixed-signal circuits!
Want to simulate your high-speed transceiver model while gradually varying the frequency-dependent loss of the channel? Here is a simple tip on how.
Check out these two simple ways of modeling a track-and-hold circuit.
This primitive models a sample-and-hold circuit, sampling the input at the clock's triggering edge and holding it til the next edge.
Modeling Mixed-Signal Processing-in-Memory Circuits, Filtering Phase Noise, and More
Modeling a Digital LDO, Tips on Modeling High-Pass Filters, and More
UVM Testbench for Verifying Adaptive DFE, Measuring the PLL's Open-Loop Transfer Function, and More
XMODEL at DVCon Europe 2024, Modeling SRAM Array, and More
Modeling PCIe Receiver Detection Circuit, Exporting XWAVE Analysis Results, and More