Yes, the finite sampling aperture mode of the 'compare' primitive can model a clocked comparator with finite sampling bandwidth and regeneration time. In this mode, the output of the 'compare' primitive depends on the weighted average of the input signal over a finite time window (called "sampling aperture") and its output delay grows exponentially as the net input magnitude ('in'-'in_ref') decreases. That is, when the net input magnitude is close to zero, the delay can be very long, causing "metastability".

The finite sampling aperture mode of the 'compare' primitive is enabled when you assign non-negative values to the real-type array parameter 'ISF_params'. The figure below illustrates how the primitive behaves when you set 'ISF_params[0:4]' to {t_d, G, τ_S, τ_R, Δ}, where t_d is the trigger delay, G is the sampling gain, τ_S is the sampling time constant, τ_R is the regeneration time constant, and Δ is the decision threshold.

The main blocks of the finite-aperture clocked comparator model are sampling filter, regenerative amplifier, and decision slicer. First, the sampling filter filters the difference between the two inputs 'in' and 'in_ref' and produces a signal 'in_smp'. Its transfer function H(s) is G/(1+sτ_S), where G and τ_S set the gain and time constant of this first-order low-pass filter, respectively. Second, the regenerative amplifier has two operating modes depending on whether the trigger delay t_d has elapsed since the triggering edge of the 'trig' input has arrived. Before the delay t_d, the regenerative amplifier passes its input 'in_smp' to its output 'in_reg' as-is. On the other hand, after the delay t_d, the regenerative amplifier amplifies the signal via positive feedback, with an impulse response h(t) = exp(+t/τ_R). It means, any input that arrives after the delay t_d will grow exponentially over time, with a time constant equal to τ_R. Finally, the decision slicer monitors whether the regenerated output 'in_reg' goes above +Δ or below -Δ, where Δ is the decision threshold. When it does, the digital decision output 'out' is updated to the corresponding logic value.

The described clocked comparator model is basically a time-varying system. In other words, the comparator has different sensitivity to the input depending on when it arrives relative to the triggering edge of 'trig'. The impulse sensitivity function (ISF) is just a mathematical way of describing this time-varying sensitivity of the system. The output observed at a chosen time t_obs (>t_d) is described as an integral of the product between the input signal and the ISF Γ(t).

The ISF Γ(t) of the finite-aperture comparator model has the following shape. It has a peak located at the delay t_d after the triggering edge of 'trig'. The exponential function describing Γ(t) prior to this peak has the time constant of τ_S, whereas the exponential function after the peak has the time constant of τ_R. The overall width of Γ(t) corresponds to the sampling aperture and the total area of Γ(t) corresponds to the total gain to a DC input. For more information on the ISF, please refer to this paper: Jaeha Kim, et al., "Simulation and Analysis of Random Decision Errors in Clocked Comparators," IEEE Transactions on Circuits and Systems I, August 2009.

While the shape of the sampling aperture function (i.e. ISF) is determined mostly by τ_S and τ_R, the delay of the comparator is determined mostly by τ_R and Δ. It is because τ_R sets the rate at which the sampled value is amplified via regeneration and Δ sets the threshold that the regenerated value must reach in order for a decision to be made.

The following testbench file 'tb_compare.sv' simulates the 'compare' primitive in the finite-aperture mode and measures its clock-to-out delay while varying the input magnitude. Note that you can access the internal signals 'in_smp' and 'in_reg' of the 'compare' primitive, which are the outputs of the sampling filter and regenerative amplifier, respectively. The polarity of the net input difference is flipped every clock cycle in order to force the change in the comparator's decision output and the delay from the positive edge of the triggering clock to the transition edge of the decision output is measured using the 'trig_posedge', 'trig_edge', and 'meas_delay' primitives.

// TESTBENCH tb_compare
// measuring the clock-to-out delay of a clocked comparator
// while varying the input magnitude

module tb_compare;
    parameter real delay_trig = 0.0;    // Trigger Delay
    parameter real gain_smp = 1.0;      // Sampling Gain
    parameter real tau_smp = 100e-12;   // Sampling Time Constant
    parameter real tau_reg = 100e-12;   // Regeneration Time Constant
    parameter real thres_out = 0.5;     // Output Threshold

    xreal in_mag, in_sign, in, in_ref;
    xreal in_smp, in_reg;
    xbit clk, out;
    xbit trig_clk, trig_out;
    real delay;

    // compare primitive in finite-aperture mode
    compare     #(.ISF_params('{delay_trig, gain_smp, tau_smp, tau_reg, thres_out}))
                COMP (.in(in), .in_ref(in_ref), .trig(clk), .out(out));

    // accessing internal signals of 'compare' primitive
    assign in_smp = COMP.in_smp;
    assign in_reg = COMP.in_reg;

    // stimuli and measurements
    pwl_gen     #(.data('{0.0,-0.1,1e-06,0.1})) SRC_INM (.out(in_mag));
    step_gen    #(.init_value(-1.0), .change(2.0), .delay(0.5e-9), .width(1e-9), .period(2e-9)) SRC_INS (in_sign);
    multiply    MULT (.in({in_mag, in_sign}), .out(in));
    dc_gen      #(.value(0.0)) SRC_REF (.out(in_ref));
    clk_gen     #(.freq(1e+09)) SRC_CLK (.out(clk));

    trig_posedge  TRIG1 (.in(clk), .out(trig_clk));
    trig_edge     TRIG2 (.in(out), .out(trig_out));
    meas_delay    MEAS (.out(delay), .from(trig_clk), .to(trig_out));

    initial begin
        $xmodel_dumpfile();
        $xmodel_dumpvars();
    end

endmodule

The simulation is run using the following command:

xmodel tb_compare.sv --top tb_compare --simtime 1us

And the simulated waveforms are shown below. The first set of waveforms confirms that the delay of the comparator exponentially increases from 160ps to 780ps while the input magnitude decreases from 0.01 towards 0.0.

This second set of waveforms is a close-in view of the 'in', 'in_ref', 'in_smp', 'in_reg', 'clk', and 'out' signals. As expected, the signal 'in_smp' is a low-pass filtered signal of the net input difference 'in'-'in_ref', and the signal 'in_reg' gets regenerated from the value of 'in_smp' when the comparator is triggered by the positive edge of 'clk'. The difference in the input magnitude causes a difference in the time it takes for 'in_reg' to reach the threshold and hence causes the difference in the delay.

Attachment: tb_compare.sv

Yes, the finite sampling aperture mode of the 'compare' primitive can model a clocked comparator with finite sampling bandwidth and regeneration time. In this mode, the output of the 'compare' primitive depends on the weighted average of the input signal over a finite time window (called "sampling aperture") and its output delay grows exponentially as the net input magnitude ('in'-'in_ref') decreases. That is, when the net input magnitude is close to zero, the delay can be very long, causing "metastability".

The finite sampling aperture mode of the 'compare' primitive is enabled when you assign non-negative values to the real-type array parameter 'ISF_params'. The figure below illustrates how the primitive behaves when you set 'ISF_params[0:4]' to {t_d, G, τ_S, τ_R, Δ}, where t_d is the trigger delay, G is the sampling gain, τ_S is the sampling time constant, τ_R is the regeneration time constant, and Δ is the decision threshold.

The main blocks of the finite-aperture clocked comparator model are sampling filter, regenerative amplifier, and decision slicer. First, the sampling filter filters the difference between the two inputs 'in' and 'in_ref' and produces a signal 'in_smp'. Its transfer function H(s) is G/(1+sτ_S), where G and τ_S set the gain and time constant of this first-order low-pass filter, respectively. Second, the regenerative amplifier has two operating modes depending on whether the trigger delay t_d has elapsed since the triggering edge of the 'trig' input has arrived. Before the delay t_d, the regenerative amplifier passes its input 'in_smp' to its output 'in_reg' as-is. On the other hand, after the delay t_d, the regenerative amplifier amplifies the signal via positive feedback, with an impulse response h(t) = exp(+t/τ_R). It means, any input that arrives after the delay t_d will grow exponentially over time, with a time constant equal to τ_R. Finally, the decision slicer monitors whether the regenerated output 'in_reg' goes above +Δ or below -Δ, where Δ is the decision threshold. When it does, the digital decision output 'out' is updated to the corresponding logic value.

The described clocked comparator model is basically a time-varying system. In other words, the comparator has different sensitivity to the input depending on when it arrives relative to the triggering edge of 'trig'. The impulse sensitivity function (ISF) is just a mathematical way of describing this time-varying sensitivity of the system. The output observed at a chosen time t_obs (>t_d) is described as an integral of the product between the input signal and the ISF Γ(t).

The ISF Γ(t) of the finite-aperture comparator model has the following shape. It has a peak located at the delay t_d after the triggering edge of 'trig'. The exponential function describing Γ(t) prior to this peak has the time constant of τ_S, whereas the exponential function after the peak has the time constant of τ_R. The overall width of Γ(t) corresponds to the sampling aperture and the total area of Γ(t) corresponds to the total gain to a DC input. For more information on the ISF, please refer to this paper: Jaeha Kim, et al., "Simulation and Analysis of Random Decision Errors in Clocked Comparators," IEEE Transactions on Circuits and Systems I, August 2009.

While the shape of the sampling aperture function (i.e. ISF) is determined mostly by τ_S and τ_R, the delay of the comparator is determined mostly by τ_R and Δ. It is because τ_R sets the rate at which the sampled value is amplified via regeneration and Δ sets the threshold that the regenerated value must reach in order for a decision to be made.

The following testbench file 'tb_compare.sv' simulates the 'compare' primitive in the finite-aperture mode and measures its clock-to-out delay while varying the input magnitude. Note that you can access the internal signals 'in_smp' and 'in_reg' of the 'compare' primitive, which are the outputs of the sampling filter and regenerative amplifier, respectively. The polarity of the net input difference is flipped every clock cycle in order to force the change in the comparator's decision output and the delay from the positive edge of the triggering clock to the transition edge of the decision output is measured using the 'trig_posedge', 'trig_edge', and 'meas_delay' primitives.

// TESTBENCH tb_compare
// measuring the clock-to-out delay of a clocked comparator
// while varying the input magnitude

module tb_compare;
    parameter real delay_trig = 0.0;    // Trigger Delay
    parameter real gain_smp = 1.0;      // Sampling Gain
    parameter real tau_smp = 100e-12;   // Sampling Time Constant
    parameter real tau_reg = 100e-12;   // Regeneration Time Constant
    parameter real thres_out = 0.5;     // Output Threshold

    xreal in_mag, in_sign, in, in_ref;
    xreal in_smp, in_reg;
    xbit clk, out;
    xbit trig_clk, trig_out;
    real delay;

    // compare primitive in finite-aperture mode
    compare     #(.ISF_params('{delay_trig, gain_smp, tau_smp, tau_reg, thres_out}))
                COMP (.in(in), .in_ref(in_ref), .trig(clk), .out(out));

    // accessing internal signals of 'compare' primitive
    assign in_smp = COMP.in_smp;
    assign in_reg = COMP.in_reg;

    // stimuli and measurements
    pwl_gen     #(.data('{0.0,-0.1,1e-06,0.1})) SRC_INM (.out(in_mag));
    step_gen    #(.init_value(-1.0), .change(2.0), .delay(0.5e-9), .width(1e-9), .period(2e-9)) SRC_INS (in_sign);
    multiply    MULT (.in({in_mag, in_sign}), .out(in));
    dc_gen      #(.value(0.0)) SRC_REF (.out(in_ref));
    clk_gen     #(.freq(1e+09)) SRC_CLK (.out(clk));

    trig_posedge  TRIG1 (.in(clk), .out(trig_clk));
    trig_edge     TRIG2 (.in(out), .out(trig_out));
    meas_delay    MEAS (.out(delay), .from(trig_clk), .to(trig_out));

    initial begin
        $xmodel_dumpfile();
        $xmodel_dumpvars();
    end

endmodule

The simulation is run using the following command:

xmodel tb_compare.sv --top tb_compare --simtime 1us

And the simulated waveforms are shown below. The first set of waveforms confirms that the delay of the comparator exponentially increases from 160ps to 780ps while the input magnitude decreases from 0.01 towards 0.0.

This second set of waveforms is a close-in view of the 'in', 'in_ref', 'in_smp', 'in_reg', 'clk', and 'out' signals. As expected, the signal 'in_smp' is a low-pass filtered signal of the net input difference 'in'-'in_ref', and the signal 'in_reg' gets regenerated from the value of 'in_smp' when the comparator is triggered by the positive edge of 'clk'. The difference in the input magnitude causes a difference in the time it takes for 'in_reg' to reach the threshold and hence causes the difference in the delay.

Attachment: tb_compare.sv