How to generate models of transistors with more than 4 terminals

Yes, if the following assumption is met: the extra terminals of your transistor devices are connected to "DC voltages", of which value can be determined from their "names". For instance, the SPICE netlist of your circuit may look like:

M1  d1 g1 s1 b1 vdd vss  nmos l=180n w=10u
M2  d2 g2 s2 b2 vss vdd  pmos l=180n w=20u

where the 5-th and 6-th terminals of the transistors M1 and M2 are connected to DC voltages, of which values can be determined by their names (vdd or vss). We found that this is typically the case.

When MODELZEN characterizes these MOSFET devices using SPICE, it instantiates those devices while preserving the names of those extra terminals. For instance, in the SPICE decks (e.g. DC_nmosfet.sp file generated within the simulation directory), the nmos device above will be instantiated as:

.subckt DUT_nmosfet DEVO_d DEVO_g DEVO_s DEVO_b
M1 DEVO_d DEVO_g DEVO_s DEVO_b vdd vss nmos l=180n w=10u
.ends DUT_nmosfet

Note that the drain, gate, source, bulk terminal names are replaced with generic names (DEVO_*) in order to apply stimuli defined in the SPICE deck. However, the names of the extra terminals are preserved as-is.

You can define the DC voltages for those extra terminal voltages simply by adding global DC voltage sources in the 'sim_option' field in the technology configuration file. In case of using HSPICE, you may add the following lines to the sim_option["hspice"] as below:

sim_option["hspice"] = """\
.option post_version=9601
.option accurate post
.option measdgt=8

vdd_ext  vdd 0  dc=1.2
vss_ext  vss 0  dc=0.0
.global vdd vss 
"""

Note that these signals are being defined as global only within the SPICE characterization simulation deck. They don't have to be global signals in the original netlist.

If you have multiple devices with different connections made to the extra terminals, those will be distinguished by their names. For instance:

M3  d3 g3 s3 b3 vdd vss  nmos l=180n w=10u 
M4  d4 g4 s4 b4 vss vdd  nmos l=180n w=10u

will be treated as two different instances of nmos and be characterized individually, reflecting the different characteristics depending on the voltages on those extra-terminals.