PDD_HoggePD : A Hogge-type phase detector (PD) for NRZ data input

A Hogge-type phase detector (PD) measures the timing difference between a periodic clock input clk and an NRZ random data, carried by differential inputs in_pos and in_neg. Unlike an Alexander-type PD that detects only the polarity of the timing error, a Hogge-type PD can also measure and produce the linear magnitude information regarding the timing error expressed by the net pulsewidth difference of its two outputs up and dn. However, its need for a limiting amplifier stage for recovering digital data and high-speed circuits for propagating short pulses may make its high-speed and low-power implementation difficult.

This Hogge-type PD model consists of a limiting amplifier that recovers the digital data in from the analog inputs in_pos and in_neg followed by a set of D-flipflops and XOR gates that produce the timing pulses, up and dn, indicating the timing error. For each data transition, the PD asserts the up signal for a fixed, half-UI period while asserting the dn signal for a variable period depending on the timing difference between in and clk. The model is composed with the slice, dff_xbit, xor_xbit, and inv_xbit primitives, all of which produce xbit-type digital outputs with accurate timings.

Input/Output Terminals

Name	I/O	Type	Description
data	output	xbit	data output
dn	output	xbit	dn output
up	output	xbit	up output
clk	input	xbit	clock input
in_neg	input	xreal	data input (neg)
in_pos	input	xreal	data input (pos)