PDD_AlexanderPD : An Alexander-type bang-bang phase detector (PD) for NRZ data input

An Alexander-type phase detector (PD) measures the timing difference between a periodic clock input clk and an NRZ random data, carried by differential inputs in_pos and in_neg. This type of PD is also called ternary-output bang-bang PD, as it produces only three possible outcomes (early, late, and neutral) through its outputs up and dn indicating the polarity of the timing error or absence of data transition.

This Alexander-type PD model is described with two clocked comparators followed by two D flip-flops. The first comparator samples the center of the incoming data signal while the second comparator samples its edge in order to detect the timing error. Two XOR gates compare the outputs of these comparators and make decisions as to whether the timing is early or late, by asserting the up or dn output accordingly. The model is composed with the compare, dff_xbit, xor_xbit, and inv_xbit primitives, all of which produce xbit-type digital outputs with accurate timings.

Input/Output Terminals

Name	I/O	Type	Description
data	output	xbit	data output
dn	output	bit	dn output
up	output	bit	up output
clk	input	xbit	clock input
in_neg	input	xreal	data input (neg)
in_pos	input	xreal	data input (pos)

Parameters

Name	Type	Default	Description
inoise	real	1e-3	input-referred noise