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CommunityCategory: XMODELModeling a gated ring oscillator with multiple output phases and arbitrary output waveforms

XMODEL

Modeling a gated ring oscillator with multiple output phases and arbitrary output waveforms

SA Support Team Staff 2024-04-30

I'd like to model a gated ring oscillator (GRO) circuit described in the paper by M. Z. Straayer and M. H. Perrott, titled "A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping" and published in IEEE J. Solid-State Circuits, April 2009. The circuit basically functions as a time-to-digital converter (TDC), measuring the pulse width of the 'Enable' input in digital quantity. To do so, the phase of the oscillator advances only while the 'Enable' input is high and remains still while it is low. The oscillator produces multiple output phases, of which transitions are individually counted to enhance the TDC resolution. Instead of digital waveforms, I would like the outputs of the gated ring oscillator model to take analog waveforms, for example, having finite rise/fall times and overshoot/undershoots. Can you show me an example of modeling such a gated ring oscillator?

1 Answers
SA Support Team Staff 2024-04-30

Sure, we can. In the attached package, you can find the cellview sandbox.gated_rosc:schematic shown below that models a gated ring oscillator (GRO) with three output phases and arbitrary analog output waveforms. While its input 'en' is high, the model produces a set of periodic waveforms defined by the 'pwl_func' primitives, of which frequency is controlled by the 'freq' input. When 'en' falls low, all the outputs stop moving until 'en' becomes high again.

In fact, this model is a simple extension of the model described in the Q&A posting titled "Q: Modeling a variable-frequency oscillator with arbitrary periodic waveform", utilizing the 'integ_mod' primitive that produces a periodic sawtooth waveform sweeping the range from 0.0 to 1.0. We just added a 'select' primitive to stop the oscillator from advancing when the 'en' input is 0 by setting the input to the 'integ_mod' primitive equal to zero. Also, we added two more 'pwl_func' primitives to produce additional output phases, of which waveform shapes and timing relationships can be expressed using a piecewise-linear format as illustrated below.

The cellview sandbox.tb_gated_rosc:schematic shown below is a simple testbench to demonstrate the operation of this GRO model. It feeds a 'freq' input gradually increasing from 100M to 200M over time and an 'en' input that periodically becomes 0 and disables the oscillation to the GRO model.

And its simulated waveforms are shown below. When the 'en' input is 1, the GRO model produces three oscillating outputs, of which waveforms and timings match to those described by the 'pwl_func' primitives. Also, when the 'en' input is 0, all the GRO outputs stay still at their last values, until 'en' becomes 1 again and the GRO resumes its oscillation.

You can also reset the phase of the GRO model when the 'en' input falls low, instead of holding it constant, by combining the approach outlined in another Q&A posting titled "Q. Generating a sinusoidal signal with a resettable phase". The cellview sandbox.gated_rosc_rst:schematic shown below uses a 'integ_rst' primitive instead of the 'integ_mod' primitive, which re-initializes its output when its 'rst' input becomes 1. But it does not perform a modulo operation, so we added a self-reset loop consisting of 'slice' and 'or_xbit' primitives that resets the output of the 'integ_rst' primitive to 0 whenever it reaches the value of 1.0.

And here are the simulated waveforms using the same testbench (sandbox.tb_gated_rosc:schematic). Just like the first GRO model, this model produces three oscillating outputs when the 'en' input is 1, of which waveforms and timings match to those described by the 'pwl_func' primitives. But it behaves differently when the 'en' input is 0. Instead of holding the last outputs and resuming from them, the oscillator model resets its outputs to fixed values and starts from them when the 'en' input becomes 1.

Attachment: gated_rosc_20240428.tar.gz

XMODEL

복수의 위상 출력과 임의의 출력 파형을 가진 gated ring oscillator 모델링하기

SA Support Team Staff 2024-04-30

M. Z. Straayer와 M. H. Perrott가 저술하고, 2009년 4월 IEEE J. Solid-State Circuits 저널에 출판된 "A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping"라는 제목의 논문에서 기술된 gated ring oscillator(GRO) 회로를 모델링하고 싶습니다. 이 회로는 기본적으로 입력 'Enable' 신호의 펄스폭을 디지털 값으로 측정하는 시간-디지털 변환회로(time-to-digital converter; TDC) 기능을 수행합니다. 그러기 위해, 오실레이터의 위상은 'Enable' 입력의 값이 1인 동안에만 진행이 되고, 0인 동안에는 멈춥니다. 또한, 이 오실레이터는 복수의 위상 출력을 생성하는데, 그 각각의 transition 횟수를 카운팅함으로써 TDC의 해상도를 높입니다. 특히, 저는 이 gated ring oscillator 모델이 디지털 출력이 아닌 유한한 상승 및 하강시간, 그리고 overshoot와 undershoot 등의 특성을 표현할 수 있는 아날로그 파형 출력을 내기를 원합니다. 이러한 조건을 만족하는 gated ring oscillator 모델의 예시를 보여주실 수 있나요?

1 Answers
SA Support Team Staff 2024-04-30

Sure, we can. In the attached package, you can find the cellview sandbox.gated_rosc:schematic shown below that models a gated ring oscillator (GRO) with three output phases and arbitrary analog output waveforms. While its input 'en' is high, the model produces a set of periodic waveforms defined by the 'pwl_func' primitives, of which frequency is controlled by the 'freq' input. When 'en' falls low, all the outputs stop moving until 'en' becomes high again.

In fact, this model is a simple extension of the model described in the Q&A posting titled "Q: Modeling a variable-frequency oscillator with arbitrary periodic waveform", utilizing the 'integ_mod' primitive that produces a periodic sawtooth waveform sweeping the range from 0.0 to 1.0. We just added a 'select' primitive to stop the oscillator from advancing when the 'en' input is 0 by setting the input to the 'integ_mod' primitive equal to zero. Also, we added two more 'pwl_func' primitives to produce additional output phases, of which waveform shapes and timing relationships can be expressed using a piecewise-linear format as illustrated below.

The cellview sandbox.tb_gated_rosc:schematic shown below is a simple testbench to demonstrate the operation of this GRO model. It feeds a 'freq' input gradually increasing from 100M to 200M over time and an 'en' input that periodically becomes 0 and disables the oscillation to the GRO model.

And its simulated waveforms are shown below. When the 'en' input is 1, the GRO model produces three oscillating outputs, of which waveforms and timings match to those described by the 'pwl_func' primitives. Also, when the 'en' input is 0, all the GRO outputs stay still at their last values, until 'en' becomes 1 again and the GRO resumes its oscillation.

You can also reset the phase of the GRO model when the 'en' input falls low, instead of holding it constant, by combining the approach outlined in another Q&A posting titled "Q. Generating a sinusoidal signal with a resettable phase". The cellview sandbox.gated_rosc_rst:schematic shown below uses a 'integ_rst' primitive instead of the 'integ_mod' primitive, which re-initializes its output when its 'rst' input becomes 1. But it does not perform a modulo operation, so we added a self-reset loop consisting of 'slice' and 'or_xbit' primitives that resets the output of the 'integ_rst' primitive to 0 whenever it reaches the value of 1.0.

And here are the simulated waveforms using the same testbench (sandbox.tb_gated_rosc:schematic). Just like the first GRO model, this model produces three oscillating outputs when the 'en' input is 1, of which waveforms and timings match to those described by the 'pwl_func' primitives. But it behaves differently when the 'en' input is 0. Instead of holding the last outputs and resuming from them, the oscillator model resets its outputs to fixed values and starts from them when the 'en' input becomes 1.

Attachment: gated_rosc_20240428.tar.gz