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For me, the 'xmodel' launcher script provides a consistent interface for running XMODEL simulations with multiple different SystemVerilog simulators. For example, my company has licenses for VCS, Xcelium, and Questa, and I can easily switch from one simulator to another when certain tool licenses are in shortage.
However, I recently started using UVM testbenches with XMODEL and noticed that the 'xmodel' launcher script lacks options for enabling UVM libraries. I am currently using the --elab-option and --sim-option options to supply the simulator-dependent options for enabling UVM, and I am now back to the Stone Age. I have to manage a different set of commands and options for each SystemVerilog simulator.
Can 'xmodel' support simulator-independent options for enabling UVM?
Starting with the XMODEL 2023.01 Release, you can use '--uvm' and '--uvm-option' options with the 'xmodel' launcher script. The '--uvm' option enables the UVM library and '--uvm-option' option lets you specify the UVM command-line options such as +UVM_TESTNAME, +UVM_VERBOSITY, etc. Here is an example:
$ xmodel <other options> --simtime inf --uvm --uvm-option +UVM_VERBOSITY=UVM_HIGH --
When you use an '--uvm' option without any argument, it enables the default built-in UVM library supported by the SystemVerilog simulator. As of this writing, most of the SystemVerilog simulators select UVM 1.1 or 1.1d by default. If you'd like to use a different version of UVM included in the SystemVerilog simulator installation, you can add an argument specifying the version, for example '--uvm 1.2' or '--uvm ieee'. The list of UVM libraries built into each SystemVerilog simulator may vary. For example, Synopsys VCS (T-2022.06) supports the versions of 1.1, 1.2, ieee, and ieee-2020, Cadence Xcelium (21.09) supports 1.1d, 1.2, 1.2-ML, and IEEE, and Siemens Questa (21.4) supports 1.1c, 1.1d, and 1.2. If you'd like to use your own UVM library instead of the built-in ones, you can also specify its path with the '--uvm' option, e.g. '--uvm /PATH/TO/YOUR/UVM/LIBRARY'.
With the '--uvm-option' option, you can specify the UVM command-line options such as +UVM_TESTNAME and +UVM_VERBOSITY. Its usage and effects are similar to those of the '--sim-option' option in a sense that you can list multiple UVM command-line options between '--uvm-option' and '--' and the listed options are passed as-is to the command executing the simulation. However, by listing the UVM command-line options with the '--uvm-option' instead of with the '--sim-option', you can indicate that those options are independent of the SystemVerilog simulator.
On the other hand, the '--simtime inf' option used in the above example lets the simulation run without a specific end time. That is, the simulation runs until it meets a $stop or $finish command or until there are no further events scheduled. It is a useful option to use with a UVM testbench, which often needs to run until certain criteria are met.
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제게 'xmodel' 명령은 복수의 다른 SystemVerilog 시뮬레이터를 사용해 XMODEL 시뮬레이션을 수행할 수 있는 일관된 인터페이스를 제공하는 매우 편리한 툴입니다. 예를 들어, 제 회사는 VCS, Xcelium, Questa에 대한 라이센스를 모두 보유하고 있는데, 'xmodel' 명령을 사용하면 특정 툴의 라이센스가 부족할때 손쉽게 다른 시뮬레이터로 바꾸어 XMODEL 시뮬레이션을 수행할 수 있습니다.
그런데, 최근에 UVM 테스트벤치를 XMODEL와 함께 사용하면서 상황이 달라졌습니다. 아직 'xmodel'에는 UVM 라이브러리를 활성화하는 표준 옵션이 지원되지 않더군요. 그래서 대신 --elab-option과 --sim-option 옵션을 사용해 각 시뮬레이터마다 다른 옵션을 사용해 UVM을 활성화하고 있는데, 이 때문에 다시 석기시대로 돌아간 느낌입니다. SystemVerilog 시뮬레이터마다 다른 명령과 옵션 조합들을 관리해야 하고, 이 때문에 시뮬레이터의 전환이 예전만큼 쉽지 않습니다.
'xmodel' 명령에 UVM 라이브러리를 활성화하기 위한 표준 옵션을 추가해주실 수 있나요?
Starting with the XMODEL 2023.01 Release, you can use '--uvm' and '--uvm-option' options with the 'xmodel' launcher script. The '--uvm' option enables the UVM library and '--uvm-option' option lets you specify the UVM command-line options such as +UVM_TESTNAME, +UVM_VERBOSITY, etc. Here is an example:
$ xmodel <other options> --simtime inf --uvm --uvm-option +UVM_VERBOSITY=UVM_HIGH --
When you use an '--uvm' option without any argument, it enables the default built-in UVM library supported by the SystemVerilog simulator. As of this writing, most of the SystemVerilog simulators select UVM 1.1 or 1.1d by default. If you'd like to use a different version of UVM included in the SystemVerilog simulator installation, you can add an argument specifying the version, for example '--uvm 1.2' or '--uvm ieee'. The list of UVM libraries built into each SystemVerilog simulator may vary. For example, Synopsys VCS (T-2022.06) supports the versions of 1.1, 1.2, ieee, and ieee-2020, Cadence Xcelium (21.09) supports 1.1d, 1.2, 1.2-ML, and IEEE, and Siemens Questa (21.4) supports 1.1c, 1.1d, and 1.2. If you'd like to use your own UVM library instead of the built-in ones, you can also specify its path with the '--uvm' option, e.g. '--uvm /PATH/TO/YOUR/UVM/LIBRARY'.
With the '--uvm-option' option, you can specify the UVM command-line options such as +UVM_TESTNAME and +UVM_VERBOSITY. Its usage and effects are similar to those of the '--sim-option' option in a sense that you can list multiple UVM command-line options between '--uvm-option' and '--' and the listed options are passed as-is to the command executing the simulation. However, by listing the UVM command-line options with the '--uvm-option' instead of with the '--sim-option', you can indicate that those options are independent of the SystemVerilog simulator.
On the other hand, the '--simtime inf' option used in the above example lets the simulation run without a specific end time. That is, the simulation runs until it meets a $stop or $finish command or until there are no further events scheduled. It is a useful option to use with a UVM testbench, which often needs to run until certain criteria are met.
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