How to map a global signal as a port of UDM

SA Support Team Staff 2019-08-12

My circuit design uses many global signals, such as vdd! and vss!. I’d like to generate bottom-up models with MODELZEN while mapping a part of the circuits to a UDM, but some of the global signals used in the lower hierarchies do not show in the UDM’s port mapping list. Is there a way to make them show?

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SA Support Team Staff 2020-08-12

Yes, there is. I will explain using a simple example. The circuit schematics shown below describe a simple buffer stage made of two CMOS inverters, where each inverter is powered by global signals, VDD! and VSS!. However, the top-level schematic of this buffer does not show these global signals. This is basically why you don't see them in the port mapping list when you try to map this circuit to a UDM.

This issue can be addressed simply by making the global signals visible on the top-level schematic. One way to achieve this is to add 'noConn' pins connected to the desired global signals like VDD! and VSS! as shown below. A 'noConn' pin is provided in the Cadence Virtuoso's 'basic' library and commonly used to suppress warning messages due to unconnected, floating signals. Since it has no real functions, the addition of these 'noConn' pins does not alter the design at all.

When you map a part of the circuits to a UDM including these 'noConn' pins, the global signals connected to the 'noConn' pins (in this case, VDD! and VSS!) show in the port mapping list and now you can define their mappings to the UDM terminals.

<<Updates since XMODEL 2020.07 Release>>

As of XMODEL 2020.07 Release, you can set a list of default global nets for UDM port mapping using the 'Set MODELZEN Options' menu of GLISTER. That is, select the GLISTER-->Set MODELZEN Options pull-down menu and list the names of the desired global signals in the 'Default Global Nets for UDM Port Mapping' option. For this example, you won't have to add the 'noConn' pins on the schematic if you list VDD! and VSS! as shown below. The 'VDD!' and 'VSS!' global nets will always appear in the UDM port mapping list. In case you don't wish to map any UDM port to the global net, you can simply leave its UDM port as blank.

It can be cumbersome to manually redefine this option every time a new Virtuoso session starts, or GLISTER is initialized. Similar to the other MODELZEN-related GLISTER options, you can initialize this option by defining a SKILL variable named 'modelzenDefaultGlobalNets'. For instance, when you insert the following code in the Virtuoso initialization script (e.g., the .cdsinit file) after the codes that initialize GLISTER, the default global nets for UDM port mapping would be set to VDD! and VSS! every time a new Virtuoso session starts.

modelzenDefaultGlobalNets = "VDD! VSS!"