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‘meas_freq’ primitive가 두배 높은 주파수값을 출력합니다
SA Support Team answered 8 months ago • 
28 views1 answers0 votes
Measuring the average power dissipation of a circuit
SA Support Team answered 9 months ago • 
39 views1 answers0 votes
회로의 평균 소모전력 측정하는 법
SA Support Team answered 9 months ago • 
22 views1 answers0 votes
Measuring the output resistance of a running transmitter
SA Support Team answered 10 months ago • 
61 views1 answers0 votes
동작 중인 송신기 회로의 출력 저항값 측정하는 법
SA Support Team answered 10 months ago • 
26 views1 answers0 votes
FSDB reader 또는 writer API 라이브러리의 버전을 알아내는 방법
SA Support Team answered 1 year ago • 
19 views1 answers0 votes
Determining the version of the FSDB reader and writer API libraries
SA Support Team answered 1 year ago • 
47 views1 answers0 votes
Mapping UDMs in the technology configuration file
SA Support Team answered 1 year ago • 
149 views2 answers1 votes
Technology configuration 파일에서 UDM 매핑 정의하는 방법
SA Support Team answered 1 year ago • 
56 views2 answers1 votes
Modeling a clocked comparator with a ‘done’ output used in asynchronous SAR ADCs
SA Support Team answered 1 year ago • 
83 views1 answers0 votes
비동기 SAR ADC 회로에서 사용되는 완료 여부 신호를 발생하는 클록 비교기 모델링하는 법
SA Support Team answered 1 year ago • 
10 views1 answers0 votes
Modeling a clocked comparator latch with analog outputs exhibiting the regeneration and resetting behaviors
SA Support Team answered 1 year ago • 
71 views1 answers0 votes
재생 및 초기화 동작을 보여주는 아날로그 출력을 가진 클록 비교기 래치 회로 모델링하는 법
SA Support Team answered 1 year ago • 
24 views1 answers0 votes
Modeling a finite-aperture clocked comparator with ‘compare’ primitive
SA Support Team answered 1 year ago • 
69 views1 answers0 votes
‘compare’ primitive를 사용하여 유한한 aperture를 갖는 클록 비교기 모델링하는 법
SA Support Team answered 1 year ago • 
19 views1 answers0 votes
Modeling a DAC with finite settling time
SA Support Team answered 1 year ago • 
43 views1 answers0 votes
유한한 정착시간(settling time)을 가진 D/A 컨버터 모델링
SA Support Team answered 1 year ago • 
11 views1 answers0 votes
Auto-generating models with all the top-level ports as real types
SA Support Team answered 1 year ago • 
27 views1 answers0 votes
모든 최상위 포트를 real 타입으로 갖는 모델 자동생성하기
SA Support Team answered 1 year ago • 
11 views1 answers0 votes
Modeling a BJT-based temperature sensor circuit
SA Support Team answered 1 year ago • 
46 views1 answers0 votes
바이폴라 트랜지스터(BJT) 기반의 온도센서 회로 모델링
SA Support Team answered 1 year ago • 
58 views1 answers0 votes
Plotting the Fourier transform (e.g. FFT) of an xreal-type signal
SA Support Team answered 1 year ago • 
58 views1 answers0 votes
xreal 타입 신호의 퓨리에 변환(FFT) 결과를 보는 방법
SA Support Team answered 1 year ago • 
56 views1 answers0 votes
Modeling a variable capacitor
SA Support Team answered 1 year ago • 
107 views1 answers0 votes
가변 커패시터의 모델링
SA Support Team answered 1 year ago • 
19 views1 answers0 votes
Injection-locked 오실레이터의 pulling 동작 모델링하기
SA Support Team answered 2 years ago • 
68 views1 answers0 votes
Modeling the pulling behavior of an injection-locked oscillator
SA Support Team answered 2 years ago • 
65 views1 answers0 votes
Body terminals of nmosfet/pmosfet primitives
SA Support Team answered 2 years ago • ,
45 views1 answers0 votes
nmosfet/pmosfet primitive들의 body 단자
SA Support Team answered 2 years ago • ,
35 views1 answers0 votes
Two simple ways to model a track-and-hold circuit
SA Support Team answered 2 years ago • 
61 views1 answers0 votes
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