The application note titled, "Modeling Amplifiers with XMODEL: Migrating from Verilog-A" shows various examples of macro-modeling amplifiers using XMODEL circuit primitives, including the ones with output voltage saturation limits and slew rate limits.

XMODEL 2022.10 Release introduced new primitives named 'vlimit' and 'ilimit', which model circuit elements that limit voltage and current, respectively. Using these primitives, it is now more straightforward to model an amplifier with limits on its output voltage and slew rate.

Here is an example of modeling an operational amplifier with limits on the output voltage and slew rate. The attached package contains a cellview sandbox.amp_limit:schematic, whose schematic is shown below. Basically, it is a macromodel of a differential-input, single-ended-output operational amplifier with a voltage gain (Av), input resistance & capacitance (Rin, Cin), and output resistance & capacitance (Rout, Cout). The 'vlimit' primitive added to the output limits the output voltage between -Vmax and +Vmax. Also, the 'ilimit' primitive inserted between the output resistor and capacitor limits the current charging the output capacitor between -Imax and +Imax, which has the effect of limiting the output slew rate between -Imax/Cout and +Imax/Cout.

The following testbench (sandbox.tb_amp_limit:schematic) is composed to show the effects of the 'vlimit' and 'ilimit' primitives when the amplifier is driven with sinusoidal signals. For ease of comparison, its output (out_limit) is compared against the output of another amplifier model without the 'vlimit' and 'ilimit' primitives (out_nolimit).

The simulated waveforms of the two amplifier outputs out_limit and out_nolimit are shown below, when the amplifiers are driven with a pair of 100kHz sinusoidal inputs with the differential swing (vsw) of ±0.25, ±0.5, and ±1.0V. The assumed model parameter values are: Rin=100K, Cin=10f, Rout=10, Cout=1n, Av=10, Vmax=5, and Imax=2.5m.

With vsw=0.25, the output voltage is within the 5V limit and output slew rate is within Imax/Cout = 2.5V/μs. Hence, no difference is observed between the outputs with and without the limiting elements (out_limit and out_nolimit). However, with vsw=0.5, the maximum output slope exceeds the slew rate limit of 2.5V/μs and the out_limit waveform exhibits the slew-rate limiting behavior. With vsw=1.0, the maximum output voltage exceeds the limit of 5V and the out_limit waveform is clipped at ±5V in addition to showing the slew-rate limited transitions.

For your information, XMODEL also provides 'vlimit_sw' and 'ilimit_sw' primitives of which voltage or current limit values can be controlled by real-type input signals instead of being fixed by the parameter values. For more details, please refer to their documentations.

Attachment: amp_limit_20221229.tar.gz

The application note titled, "Modeling Amplifiers with XMODEL: Migrating from Verilog-A" shows various examples of macro-modeling amplifiers using XMODEL circuit primitives, including the ones with output voltage saturation limits and slew rate limits.

XMODEL 2022.10 Release introduced new primitives named 'vlimit' and 'ilimit', which model circuit elements that limit voltage and current, respectively. Using these primitives, it is now more straightforward to model an amplifier with limits on its output voltage and slew rate.

Here is an example of modeling an operational amplifier with limits on the output voltage and slew rate. The attached package contains a cellview sandbox.amp_limit:schematic, whose schematic is shown below. Basically, it is a macromodel of a differential-input, single-ended-output operational amplifier with a voltage gain (Av), input resistance & capacitance (Rin, Cin), and output resistance & capacitance (Rout, Cout). The 'vlimit' primitive added to the output limits the output voltage between -Vmax and +Vmax. Also, the 'ilimit' primitive inserted between the output resistor and capacitor limits the current charging the output capacitor between -Imax and +Imax, which has the effect of limiting the output slew rate between -Imax/Cout and +Imax/Cout.

The following testbench (sandbox.tb_amp_limit:schematic) is composed to show the effects of the 'vlimit' and 'ilimit' primitives when the amplifier is driven with sinusoidal signals. For ease of comparison, its output (out_limit) is compared against the output of another amplifier model without the 'vlimit' and 'ilimit' primitives (out_nolimit).

The simulated waveforms of the two amplifier outputs out_limit and out_nolimit are shown below, when the amplifiers are driven with a pair of 100kHz sinusoidal inputs with the differential swing (vsw) of ±0.25, ±0.5, and ±1.0V. The assumed model parameter values are: Rin=100K, Cin=10f, Rout=10, Cout=1n, Av=10, Vmax=5, and Imax=2.5m.

With vsw=0.25, the output voltage is within the 5V limit and output slew rate is within Imax/Cout = 2.5V/μs. Hence, no difference is observed between the outputs with and without the limiting elements (out_limit and out_nolimit). However, with vsw=0.5, the maximum output slope exceeds the slew rate limit of 2.5V/μs and the out_limit waveform exhibits the slew-rate limiting behavior. With vsw=1.0, the maximum output voltage exceeds the limit of 5V and the out_limit waveform is clipped at ±5V in addition to showing the slew-rate limited transitions.

For your information, XMODEL also provides 'vlimit_sw' and 'ilimit_sw' primitives of which voltage or current limit values can be controlled by real-type input signals instead of being fixed by the parameter values. For more details, please refer to their documentations.

Attachment: amp_limit_20221229.tar.gz