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I’d like to make the delays in my SystemVerilog modules independent of the simulation timescale. To this end, I know SystemVerilog supports the use of absolute time values in the delay expressions:
assign #(2ns) out = ~in;
However, when a parameter or variable is defining the delay amount, the value stored in the parameter or variable is always interpreted as a relative time value.
assign #(delay) out = ~in;
It makes the actual delay vary with the timescale defined for the simulation. I could add a 'timescale directive within the module so that the timescale is under my control, but I am worried that defining the timescale to my preference may in turn affect other modules without the 'timescale directives.
Is there a better way to define a delay using a parameter or variable storing the absolute time value?
Yes, there is. You can use a $xmodel_reltime() system function to convert the absolute time value of the parameter or variable to a relative time value and use the result to define your delay. Here is an example of defining a delay using the absolute time value stored in the parameter 'delay':
module my_inv (input in, output out); parameter real delay = 200e-12; // absolute time value real delay_r; initial delay_r = $xmodel_reltime(delay); // relative time value assign #(delay_r) out = ~in; // delay expression endmodule
During the initial step, the $xmodel_reltime() system function converts the absolute time value stored in the parameter 'delay' to a relative time value and a real-type variable 'delay_r' keeps the result. Then, you can use the variable 'delay_r' to define your delay. Note that this absolute-to-relative time value conversion reflects the timescale effective within each context and may produce different results depending on the location if you are using multiple timescales in your design hierarchy.
For your information, XMODEL offers both $xmodel_abstime() and $xmodel_reltime() system functions. When they are called without any argument, they respectively return the absolute and relative time values of the current simulation time.
current_absolute_time = $xmodel_abstime(); current_relative_time = $xmodel_reltime();
On the other hand, when they are called with a real-type argument, they perform the relative-to-absolute and absolute-to-relative time value conversions, respectively.
absolute_time_value = $xmodel_abstime(relative_time_value); relative_time_value = $xmodel_reltime(absolute_time_value);
The input and output values of $xmodel_abstime() and $xmodel_reltime() are all real-typed. And the results reflect the effective timescale within the given context.
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SystemVerilog 모듈내에 사용한 지연시간들을 시뮬레이션의 timescale에 무관한 형태로 정의하고 싶습니다. 이를 위해, SystemVerilog에서는 아래처럼 절대시간값을 지연시간으로 사용할 수 있음을 압니다.
assign #(2ns) out = ~in;
그러나, 아래처럼 파라메터 또는 변수를 사용해서 지연시간을 정의할 때에는, 그 파라메터 또는 변수에 저장된 값이 항상 상대시간값으로 해석된다는 문제가 있습니다.
assign #(delay) out = ~in;
즉, 실제 적용되는 지연시간값이 시뮬레이션에서 정의된 timescale에 따라 변하게 됩니다. 해당 모듈 내부에 'timescale 지시문을 추가해 timescale값을 내가 원하는대로 정의할 수도 있겠지만, 그렇게 하면 또 'timescale 지시문을 사용하지 않은 다른 모듈들 내부에 사용된 상대지연시간 값들에 영향을 주게 될까 걱정됩니다.
절대시간값을 저장하고 있는 파라메터 또는 변수를 사용해 지연시간을 정의하는 더 좋은 방법이 있을까요?
Yes, there is. You can use a $xmodel_reltime() system function to convert the absolute time value of the parameter or variable to a relative time value and use the result to define your delay. Here is an example of defining a delay using the absolute time value stored in the parameter 'delay':
module my_inv (input in, output out); parameter real delay = 200e-12; // absolute time value real delay_r; initial delay_r = $xmodel_reltime(delay); // relative time value assign #(delay_r) out = ~in; // delay expression endmodule
During the initial step, the $xmodel_reltime() system function converts the absolute time value stored in the parameter 'delay' to a relative time value and a real-type variable 'delay_r' keeps the result. Then, you can use the variable 'delay_r' to define your delay. Note that this absolute-to-relative time value conversion reflects the timescale effective within each context and may produce different results depending on the location if you are using multiple timescales in your design hierarchy.
For your information, XMODEL offers both $xmodel_abstime() and $xmodel_reltime() system functions. When they are called without any argument, they respectively return the absolute and relative time values of the current simulation time.
current_absolute_time = $xmodel_abstime(); current_relative_time = $xmodel_reltime();
On the other hand, when they are called with a real-type argument, they perform the relative-to-absolute and absolute-to-relative time value conversions, respectively.
absolute_time_value = $xmodel_abstime(relative_time_value); relative_time_value = $xmodel_reltime(absolute_time_value);
The input and output values of $xmodel_abstime() and $xmodel_reltime() are all real-typed. And the results reflect the effective timescale within the given context.
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