Yes, you can run SystemVerilog simulations with XMODEL primitives without using the 'xmodel' launcher command. As a matter of fact, the 'xmodel' launcher is simply a wrapper script that provides a consistent command-line interface working with multiple simulators: e.g. VCS, NCVerilog/Xcelium, and ModelSim/Questa. Once receiving a user command, the 'xmodel' launcher translates it into the simulator-specific commands and executes them.

You can see these simulator-specific commands executed by the 'xmodel' launcher by adding a '--command' option to your 'xmodel' command. For example, if your command is:

xmodel tb.sv --top tb --simtime 10ns --timescale 1ps/1ps --sim vcs

which uses VCS, you can append a '--command' option to see the actual commands and options executed by the 'xmodel' launcher:

$ xmodel tb.sv --top tb --simtime 10ns --timescale 1ps/1ps --sim vcs --command

vcs +v2k -sverilog +vpi -debug_access +incdir+${XMODEL_HOME}/include \
    -f ${XMODEL_HOME}/include/xmodel.f -top XMODEL_global -full64 \
    -P ${XMODEL_HOME}/lib/x86_64/xmodel_vcs.tab ${XMODEL_HOME}/lib/x86_64/xmodel_vcs.so \
    tb.sv -top tb -timescale=1ps/1ps +define+XMODEL +define+XMODEL_TIMEPRECISION=1ps \
    -o ./simv
./simv +vcs+finish+10ns

On the other hand, the same command for the NCVerilog simulator gives:

$ xmodel tb.sv --top tb --simtime 10ns --timescale 1ps/1ps --sim ncverilog --command

ncverilog -elaborate +nctop+XMODEL_global +ncerror+CUVMPW \
    +incdir+${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    +nc64bit +sv_lib=${XMODEL_HOME}/lib/x86_64/xmodel_nc.so \
    +loadvpi=${XMODEL_HOME}/lib/x86_64/xmodel_nc:sys_register_xmodel +access+rwc \
    tb.sv +nctop+tb +nctimescale+1ps/1ps +define+XMODEL +define+NCVERILOG \
    +define+XMODEL_TIMEPRECISION=1ps
ncverilog -R -s +ncunbuffered +nc64bit +sv_lib=${XMODEL_HOME}/lib/x86_64/xmodel_nc.so \
    +loadvpi=${XMODEL_HOME}/lib/x86_64/xmodel_nc:sys_register_xmodel \
    -input "@run -timepoint 10ns; exit"

For XCelium:

$ xmodel tb.sv --top tb --simtime 10ns --timescale 1ps/1ps --sim xcelium --command

xmverilog -elaborate +xmtop+XMODEL_global +xmerror+CUVMPW \
    +incdir+${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    +xm64bit +sv_lib=${XMODEL_HOME}/lib/x86_64/xmodel_xm.so \
    +loadvpi=${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel +access+rwc \
    tb.sv +xmtop+tb +xmtimescale+1ps/1ps +define+XMODEL +define+NCVERILOG 
    +define+XMODEL_TIMEPRECISION=1ps
xmverilog -R -s +xmunbuffered +xm64bit +sv_lib=${XMODEL_HOME}/lib/x86_64/xmodel_xm.so \
    +loadvpi=${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel \
    -input "@run -timepoint 10ns; exit"

And for ModelSim/Questa:

$ xmodel tb.sv --top tb --simtime 10ns --timescale 1ps/1ps --sim modelsim --command

vlib work
vlog -sv -mfcu +incdir+${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    tb.sv -timescale 1ps/1ps +define+XMODEL +define+XMODEL_TIMEPRECISION=1ps
vsim -c XMODEL_global -sv_lib ${XMODEL_HOME}/lib/x86_64/xmodel_msim \
    -pli ${XMODEL_HOME}/lib/x86_64/xmodel_msim.sl tb -do "run 10ns; exit" \
    -wlf ./xmodel.wlf

Please note that these simulator-specific commands may change without notice in future XMODEL releases.

For your information, here are examples of running the same simulation using the 'xrun' or 'xmsim' commands instead of the 'xmverilog' command. While all of them are the commands of Cadence XCelium delivering eventually the same results, please note the subtle differences in their option formats (e.g. +loadvpi vs. -loadvpi).

xrun -top XMODEL_global -xmerror CUVMPW \
    -incdir ${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    -64bit -sv_lib ${XMODEL_HOME}/lib/x86_64/xmodel_xm.so \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel -access +rwc \
    -define XMODEL -define NCVERILOG -define XMODEL_TIMEPRECISION=1ps \
    tb.sv -top tb -timescale 1ps/1ps \
    -unbuffered -input "@run -timepoint 10ns; exit"

xmvlog -sv -incdir ${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    -define XMODEL -define NCVERILOG -define XMODEL_TIMEPRECISION=1ps \
    tb.sv
xmelab XMODEL_global -timescale 1ps/1ps -xmerror CUVMPW \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel -access +rwc \
    tb -snapshot worklib.tb:module
xmsim worklib.tb:module \
    -64bit -sv_lib ${XMODEL_HOME}/lib/x86_64/xmodel_xm.so \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel \
    -unbuffered -input "@run -timepoint 10ns; exit"

Similarly, here are examples of running the same simulation using the 'irun' or 'ncsim' commands instead of the 'ncverilog' command of Cadence INCISIVE (NCVerilog). Again, please note the subtle differences in their option formats. Please refer to the Cadence documentation for more information.

irun -top XMODEL_global -ncerror CUVMPW \
    -incdir ${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \
    -64bit -sv_lib ${XMODEL_HOME}/lib/x86_64/xmodel_nc.so \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_xm:sys_register_xmodel -access +rwc \
    -define XMODEL -define NCVERILOG -define XMODEL_TIMEPRECISION=1ps \
    tb.sv -top tb -timescale 1ps/1ps \
    -unbuffered -input "@run -timepoint 10ns; exit"

ncvlog -sv -incdir ${XMODEL_HOME}/include -f ${XMODEL_HOME}/include/xmodel.f \ 
    -define XMODEL -define NCVERILOG -define XMODEL_TIMEPRECISION=1ps \
    tb.sv
ncelab XMODEL_global -timescale 1ps/1ps -ncerror CUVMPW \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_nc:sys_register_xmodel -access +rwc \
    tb -snapshot worklib.tb:module
ncsim worklib.tb:module \
    -64bit -sv_lib ${XMODEL_HOME}/lib/x86_64/xmodel_nc.so \
    -loadvpi ${XMODEL_HOME}/lib/x86_64/xmodel_nc:sys_register_xmodel \
    -unbuffered -input "@run -timepoint 10ns; exit"